5493 search results - page 995 / 1099 » Effectively Polynomial Simulations |
ARCS
2009
Springer
14 years 3 months ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
OOPSLA
2009
Springer
14 years 3 months ago
2009
Springer
We present Chorus, a high-level parallel programming model suitable for irregular, heap-manipulating applications like mesh refinement and epidemic simulations, and JChorus, an i...
CF
2009
ACM
14 years 3 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
ISLPED
2009
ACM
14 years 3 months ago
2009
ACM
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
ACSAC
2008
IEEE
14 years 3 months ago
2008
IEEE
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...