303 search results - page 24 / 61 » Efficient Design Error Correction of Digital Circuits |
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
While Moore’s Law predicts the ability of semi-conductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in t...
IOLTS
2005
IEEE
14 years 2 months ago
2005
IEEE
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...
DAC
2004
ACM
14 years 9 months ago
2004
ACM
As technology advances, the metal width is decreasing with the length increasing, making the resistance along the power line increase substantially. Together with the nonlinear sc...
ISLPED
1996
ACM
14 years 26 days ago
1996
ACM
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
AHS
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...