303 search results - page 42 / 61 » Efficient Design Error Correction of Digital Circuits |
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents an efficient image signal processing structure for CMOS image sensors to achieve low area and power consumption. Although CMOS image sensors (CISs) have variou...
GLVLSI
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper introduces a standard cell based design for a Serializer and Deserializer (SerDes) communication link. The proposed design is area, power and design time efficient as c...
ICCAD
1996
IEEE
14 years 27 days ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
ICES
2000
Springer
14 years 10 days ago
2000
Springer
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...