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FMCAD
2007
Springer
15 years 10 months ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony
VLDB
2007
ACM
204views Database» more  VLDB 2007»
15 years 10 months ago
Optimization of Frequent Itemset Mining on Multiple-Core Processor
Multi-core processors are proliferated across different domains in recent years. In this paper, we study the performance of frequent pattern mining on a modern multi-core machine....
Eric Li, Li Liu
AICCSA
2006
IEEE
143views Hardware» more  AICCSA 2006»
15 years 10 months ago
An Innovative Self-Configuration Approach for Networked Systems and Applications
The increased complexity, heterogeneity and the dynamism of networked systems and services make current control and management tools to be ineffective in managing and securing suc...
Huoping Chen, Salim Hariri, Fahd Rasul
AICCSA
2006
IEEE
179views Hardware» more  AICCSA 2006»
15 years 10 months ago
Supporting the SPEM with a UML Extended Workflow Metamodel
The specification, analysis, and administration of business processes have charged great importance in this last time. This has been caused by a competitive industry necessity, dy...
Narayan C. Debnath, Daniel Riesco, Manuel Pé...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
15 years 10 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...