Sciweavers

192 search results - page 11 / 39
» Efficient Hierarchical Approach to Test Generation for Digit...
Sort
View
DFT
2003
IEEE
64views VLSI» more  DFT 2003»
14 years 25 days ago
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, ...
DIMVA
2006
13 years 9 months ago
Digital Forensic Reconstruction and the Virtual Security Testbed ViSe
This paper presents ViSe, a virtual security testbed, and demonstrates how it can be used to efficiently study computer attacks and suspect tools as part of a computer crime recons...
André Årnes, Paul Haas, Giovanni Vign...
CODES
2010
IEEE
13 years 5 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
DELOS
2007
13 years 9 months ago
Integration of Reliable Sensor Data Stream Management into Digital Libraries
Data Stream Management (DSM) addresses the continuous processing of sensor data. DSM requires the combination of stream operators, which may run on different distributed devices, ...
Gert Brettlecker, Heiko Schuldt, Peter M. Fischer,...
3DGIS
2006
Springer
14 years 1 months ago
Texture Generation and Mapping Using Video Sequences for 3D Building Models
Abstract Three-dimensional (3D) building model is one of the most important components in a cyber city implementation and application. This study developed an effective and highly ...
Fuan Tsai, Cheng-Hsuan Chen, Jin-Kim Liu, Kuo-Hsin...