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IPPS
2010
IEEE
13 years 5 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
13 years 5 months ago
STEM: Spatiotemporal Management of Capacity for Intra-core Last Level Caches
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
Dongyuan Zhan, Hong Jiang, Sharad C. Seth
SECON
2010
IEEE
13 years 5 months ago
Utility-Based Gateway Deployment for Supporting Multi-Domain DTNs
Abstract--Due to technology or policy constraints, communications across network domains usually require the intervention of gateways, and their proper deployment is crucial to the...
Ting He, Kang-Won Lee, Nikoletta Sofra, Kin K. Leu...
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
BMCBI
2010
112views more  BMCBI 2010»
13 years 7 months ago
Computational identification of rare codons of Escherichia coli based on codon pairs preference
Background: Codon bias is believed to play an important role in the control of gene expression. In Escherichia coli, some rare codons, which can limit the expression level of exog...
Xianming Wu, Songfeng Wu, Dong Li, Jiyang Zhang, L...