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CORR
2010
Springer
196views Education» more  CORR 2010»
13 years 7 months ago
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...
H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, ...
ASPLOS
2008
ACM
13 years 9 months ago
Optimistic parallelism benefits from data partitioning
Recent studies of irregular applications such as finite-element mesh generators and data-clustering codes have shown that these applications have a generalized data parallelism ar...
Milind Kulkarni, Keshav Pingali, Ganesh Ramanaraya...
IEEEPACT
1998
IEEE
13 years 11 months ago
Optimistic Register Coalescing
Register coalescing is used, as part of register allocation, to reduce the number of register copies. Developing efficient register coalescing heuristics is particularly important ...
Jinpyo Park, Soo-Mook Moon
ISPA
2004
Springer
14 years 22 days ago
Towards Correct Distributed Simulation of High-Level Petri Nets with Fine-Grained Partitioning
Abstract. Powerful grid and cluster computers allow efficient distributed simulation. Optimistic simulation techniques have been developed which allow for more parallelism in the l...
Michael Knoke, Felix Kühling, Armin Zimmerman...
ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
13 years 11 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick