107 search results - page 5 / 22 » Efficient Self Simulation Algorithms for Reconfigurable Arra... |
DFT
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
AHS
2006
IEEE
14 years 1 months ago
2006
IEEE
Evolvable hardware refers to a self reconfigurable electronic circuit, where the circuit configuration is under the control of an evolutionary algorithm. Evolvable hardware has sh...
TACAS
1998
Springer
13 years 12 months ago
1998
Springer
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
FAW
2008
Springer
13 years 9 months ago
2008
Springer
constraint bipartite vertex cover is a graph-theoretical formalization of the spare allocation problem for reconfigurable arrays. We report on an implementation of a parameterized ...
ERSA
2009
13 years 5 months ago
2009
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...