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ERSA
2006
133views Hardware» more  ERSA 2006»
15 years 5 months ago
An FPGA based Co-Design Architecture for MIMO Lattice Decoders
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
Cao Liang, Jing Ma, Xin-Ming Huang
EUC
2006
Springer
15 years 8 months ago
Write Back Routine for JFFS2 Efficient I/O
Abstract. When flash memory is used as a storage in embedded systems, block level translation layer is required between conventional filesystem and flash memory chips due to its ph...
Seung Ho Lim, Sung Hoon Baek, Joo Young Hwang, Kyu...
PERCOM
2008
ACM
16 years 4 months ago
Location Fingerprint Analyses Toward Efficient Indoor Positioning
Abstract--Analytical models to evaluate and predict "precision" performance of indoor positioning systems based on location fingerprinting are lacking. Such models can be...
Nattapong Swangmuang, Prashant Krishnamurthy
EMSOFT
2010
Springer
15 years 2 months ago
PinaVM: a systemC front-end based on an executable intermediate representation
SystemC is the de facto standard for modeling embedded systems. It allows system design at various levels of abstractions, provides typical object-orientation features and incorpo...
Kevin Marquet, Matthieu Moy
INFOCOM
2005
IEEE
15 years 10 months ago
IPStash: a set-associative memory approach for efficient IP-lookup
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
Stefanos Kaxiras, Georgios Keramidas