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VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
14 years 8 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
ESTIMEDIA
2006
Springer
13 years 11 months ago
Neighbors-on-Path: A New Selection Strategy for On-Chip Networks
Efficient and deadlock-free routing is critical to the performance of networks-on-chip. In this paper we present an approach that can be coupled to any adaptive routing algorithm ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
IPPS
2006
IEEE
14 years 1 months ago
Conjugate gradient sparse solvers: performance-power characteristics
We characterize the performance and power attributes of the conjugate gradient (CG) sparse solver which is widely used in scientific applications. We use cycle-accurate simulatio...
Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary ...
IPPS
2007
IEEE
14 years 1 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
CISIS
2009
IEEE
13 years 5 months ago
Lifetime in Wireless Sensor Networks
The following paper deals with criterion used to measure communication protocol efficiency in Wireless Sensor Networks. As energy is a crucial characteristic of those networks, it...
Julien Champ, Clément Saad, Anne-Elisabeth ...