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» Efficient memory shadowing for 64-bit architectures
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ISCC
2005
IEEE
119views Communications» more  ISCC 2005»
15 years 11 months ago
A Systematic Approach to Building High Performance Software-Based CRC Generators
—A framework for designing a family of novel fast CRC generation algorithms is presented. Our algorithms can ideally read arbitrarily large amounts of data at a time, while optim...
Michael E. Kounavis, Frank L. Berry
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
15 years 11 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...