166 search results - page 11 / 34 » Efficient worst case timing analysis of data caching |
WAE
2001
13 years 9 months ago
2001
Abstract. A new realization of a space-efficient deque is presented. The data structure is constructed from three singly resizable arrays, each of which is a blockwiseallocated pil...
STACS
1999
Springer
13 years 12 months ago
1999
Springer
Abstract. We advocate to analyze the average complexity of learning problems. An appropriate framework for this purpose is introduced. Based on it we consider the problem of learni...
DATE
2011
IEEE
12 years 11 months ago
2011
IEEE
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
IPCCC
2007
IEEE
14 years 1 months ago
2007
IEEE
As Chip Multiprocessor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors to the PC market. In this paper, perfor...
WCET
2010
13 years 5 months ago
2010
To take full advantage of the increasingly used shared-memory multicore architectures, software algorithms will need to be parallelized over multiple threads. This means that thre...