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IEEEPACT
2002
IEEE
14 years 3 months ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
INTEGRATION
2007
100views more  INTEGRATION 2007»
13 years 10 months ago
A fast pipelined multi-mode DES architecture operating in IP representation
The Data Encryption Standard (DES) is a cipher that is still used in a broad range of applications, from smartcards, where it is often implemented as a tamperresistant embedded co...
Sylvain Guilley, Philippe Hoogvorst, Renaud Pacale...
RTAS
1998
IEEE
14 years 2 months ago
End-Host Architecture for QoS-Adaptive Communication
Proliferation of communication-intensive real-time applications with elastic" timeliness constraints, such as streaming stored video, requires a new design for endhost commun...
Tarek F. Abdelzaher, Kang G. Shin
LCTRTS
2004
Springer
14 years 3 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
EMSOFT
2006
Springer
14 years 2 months ago
New approach to architectural synthesis: incorporating QoS constraint
Embedded applications like video decoding, video streaming and those in the network domain, typically have a Quality of Service (QoS) requirement which needs to be met. Apart from...
Harsh Dhand, Basant Kumar Dwivedi, M. Balakrishnan