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ERSA
2003
126views Hardware» more  ERSA 2003»
13 years 10 months ago
Co-Simulation of a Hybrid Multi-Context Architecture
Abstract— Reconfigurable computing architectures aim to dynamically adapt their hardware to the application at hand. As research shows, the time it takes to reconfigure the har...
Rolf Enzler, Christian Plessl, Marco Platzner
MOMPES
2008
IEEE
14 years 3 months ago
Architectural Concurrency Equivalence with Chaotic Models
During its lifetime, embedded systems go through multiple changes to their runtime architecture. That is, threads, processes, and processor are added or removed to/from the softwa...
Dionisio de Niz
ISPASS
2006
IEEE
14 years 3 months ago
ATTILA: a cycle-level execution-driven simulator for modern GPU architectures
The present work presents a cycle-level execution-driven simulator for modern GPU architectures. We discuss the simulation model used for our GPU simulator, based in the concept o...
Victor Moya Del Barrio, Carlos González, Jo...
ARTQOS
2003
Springer
14 years 2 months ago
An IP QoS Architecture for 4G Networks
: This paper describes an architecture for differentiation of Quality of Service in heterogeneous wireless-wired networks. This architecture applies an “all-IP” paradigm, with ...
Janusz Gozdecki, Piotr Pacyna, Victor Marques, Rui...
ISORC
1998
IEEE
14 years 1 months ago
The Time-Triggered Architecture
The Time-Triggered Architecture (TTA) provides a computing infrastructure for the design and implementation of dependable distributed embedded systems. A large real-time applicatio...
Hermann Kopetz