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ARC
2010
Springer
183views Hardware» more  ARC 2010»
13 years 9 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
CODES
2010
IEEE
13 years 7 months ago
Exploring models of computation with ptolemy II
The Ptolemy project studies modeling, simulation, and design of concurrent, real-time, embedded systems. The focus is on assembly of concurrent components. The key underlying prin...
Christopher X. Brooks, Edward A. Lee, Stavros Trip...
CODES
2010
IEEE
13 years 7 months ago
Worst-case performance analysis of synchronous dataflow scenarios
Synchronous Dataflow (SDF) is a powerful analysis tool for regular, cyclic, parallel task graphs. The behaviour of SDF graphs however is static and therefore not always able to ac...
Marc Geilen, Sander Stuijk
EMSOFT
2010
Springer
13 years 7 months ago
Reducing stack with intra-task threshold priorities in real-time systems
In the design of hard real-time systems, the feasibility of the task set is one of the primary concerns. However, in embedded systems with scarce resources, optimizing resource us...
Gang Yao, Giorgio C. Buttazzo
WCET
2010
13 years 7 months ago
A Code Policy Guaranteeing Fully Automated Path Analysis
Calculating the worst-case execution time (WCET) of real-time tasks is still a tedious job. Programmers are required to provide additional information on the program flow, analyzi...
Benedikt Huber, Peter P. Puschner