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» Enabling SystemC Verification using Abstract State Machines
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HASE
2007
IEEE
14 years 4 months ago
On the Verifiability of Programs Written in the Feature Language Extensions
High assurance in embedded system software is difficult to attain. Verification relies on testing. The unreliable and costly testing process is made much worse because the softwar...
Wu-Hon F. Leung
POPL
2010
ACM
14 years 7 months ago
On the Verification Problem for Weak Memory Models
We address the verification problem of finite-state concurrent programs running under weak memory models. These models capture the reordering of program (read and write) operation...
Ahmed Bouajjani, Madanlal Musuvathi, Mohamed Faouz...
FORTE
2010
13 years 11 months ago
On Efficient Models for Model Checking Message-Passing Distributed Protocols
Abstract. The complexity of distributed algorithms, such as state machine replication, motivates the use of formal methods to assist correctness verification. The design of the for...
Péter Bokor, Marco Serafini, Neeraj Suri
UML
2005
Springer
14 years 3 months ago
Specifying Precise Use Cases with Use Case Charts
Use cases are a popular method for capturing and structuring software requirements. The informality of use cases is both a blessing and a curse. It enables easy application and lea...
Jon Whittle
FM
2008
Springer
130views Formal Methods» more  FM 2008»
13 years 11 months ago
Specification and Checking of Software Contracts for Conditional Information Flow
Abstract. Information assurance applications built according to the MILS (Multiple Independent Levels of Security) architecture often contain information flow policies that are con...
Torben Amtoft, John Hatcliff, Edwin Rodrígu...