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FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
13 years 1 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
ICDE
2011
IEEE
258views Database» more  ICDE 2011»
13 years 1 months ago
SystemML: Declarative machine learning on MapReduce
Abstract—MapReduce is emerging as a generic parallel programming paradigm for large clusters of machines. This trend combined with the growing need to run machine learning (ML) a...
Amol Ghoting, Rajasekar Krishnamurthy, Edwin P. D....
DSD
2011
IEEE
200views Hardware» more  DSD 2011»
12 years 9 months ago
Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors
Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...
Jaroslav Sykora, Leos Kafka, Martin Danek, Lukas K...
DAC
2012
ACM
12 years 12 days ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra
HPDC
2012
IEEE
12 years 12 days ago
vSlicer: latency-aware virtual machine scheduling via differentiated-frequency CPU slicing
Recent advances in virtualization technologies have made it feasible to host multiple virtual machines (VMs) in the same physical host and even the same CPU core, with fair share ...
Cong Xu, Sahan Gamage, Pawan N. Rao, Ardalan Kanga...