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IPPS
2000
IEEE
14 years 1 months ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
IPPS
2002
IEEE
14 years 1 months ago
Dynamic Power Management of Multiprocessor Systems
Power management is critical to power-constrained real-time systems. In this paper, we present a dynamic power management algorithm. Unlike other approaches that focus on the trad...
Jinwoo Suh, Dong-In Kang, Stephen P. Crago
HPCA
2001
IEEE
14 years 9 months ago
A New Scalable Directory Architecture for Large-Scale Multiprocessors
The memory overhead introduced by directories constitutes a major hurdle in the scalability of cc-NUMA architectures, which makes the shared-memory paradigm unfeasible for very la...
Manuel E. Acacio, José González, Jos...
JSA
2008
91views more  JSA 2008»
13 years 8 months ago
Using supplier locality in power-aware interconnects and caches in chip multiprocessors
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
Ehsan Atoofian, Amirali Baniasadi
GECCO
2009
Springer
193views Optimization» more  GECCO 2009»
14 years 1 months ago
Optimization of dynamic memory managers for embedded systems using grammatical evolution
New portable consumer embedded devices must execute multimedia applications (e.g., 3D games, video players and signal processing software, etc.) that demand extensive memory acces...
José L. Risco-Martín, David Atienza,...