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CODES
2010
IEEE
13 years 5 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
SBACPAD
2007
IEEE
143views Hardware» more  SBACPAD 2007»
14 years 1 months ago
A Code Compression Method to Cope with Security Hardware Overheads
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
Eduardo Wanderley Netto, Romain Vaslin, Guy Gognia...
ASAP
2011
IEEE
233views Hardware» more  ASAP 2011»
12 years 7 months ago
Accelerating vision and navigation applications on a customizable platform
—The domain of vision and navigation often includes applications for feature tracking as well as simultaneous localization and mapping (SLAM). As these problems require computati...
Jason Cong, Beayna Grigorian, Glenn Reinman, Marco...
HIPEAC
2007
Springer
14 years 1 months ago
Performance/Energy Optimization of DSP Transforms on the XScale Processor
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
Paolo D'Alberto, Markus Püschel, Franz Franch...
C3S2E
2009
ACM
13 years 11 months ago
The promise of solid state disks: increasing efficiency and reducing cost of DBMS processing
Most database systems (DBMSs) today are operating on servers equipped with magnetic disks. In our contribution, we want to motivate the use of two emerging and striking technologi...
Karsten Schmidt 0002, Yi Ou, Theo Härder