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ICPP
1999
IEEE
14 years 1 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
IEEEPACT
2006
IEEE
14 years 2 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
ISLPED
2003
ACM
111views Hardware» more  ISLPED 2003»
14 years 2 months ago
Energy-aware memory allocation in heterogeneous non-volatile memory systems
Memory systems consume a significant portion of power in handheld embedded systems. So far, low-power memory techniques have addressed the power consumption when the system is tu...
Hyung Gyu Lee, Naehyuck Chang
ISCA
2007
IEEE
126views Hardware» more  ISCA 2007»
14 years 3 months ago
Comparing memory systems for chip multiprocessors
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...
Jacob Leverich, Hideho Arakida, Alex Solomatnikov,...
DATE
2002
IEEE
130views Hardware» more  DATE 2002»
14 years 1 months ago
Assigning Program and Data Objects to Scratchpad for Energy Reduction
The number of embedded systems is increasing and a remarkable percentage is designed as mobile applications. For the latter, the energy consumption is a limiting factor because of...
Stefan Steinke, Lars Wehmeyer, Bo-Sik Lee, Peter M...