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ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
12 years 9 days ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
EMSOFT
2009
Springer
14 years 4 months ago
Handling mixed-criticality in SoC-based real-time embedded systems
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...
Rodolfo Pellizzoni, Patrick O'Neil Meredith, Min-Y...
QOSA
2007
Springer
14 years 4 months ago
Reusable Architectural Decision Models for Enterprise Application Development
Abstract. In enterprise application development and other software construction projects, a critical success factor is to make sound architectural decisions. Text templates and too...
Olaf Zimmermann, Thomas Gschwind, Jochen Malte K&u...
CSCW
2010
ACM
14 years 6 months ago
The work of sustaining order in wikipedia: the banning of a vandal
In this paper, we examine the social roles of software tools in the English-language Wikipedia, specifically focusing on autonomous editing programs and assisted editing tools. Th...
R. Stuart Geiger, David Ribes
CCS
2007
ACM
14 years 4 months ago
Analysis of three multilevel security architectures
Various system architectures have been proposed for high assurance enforcement of multilevel security. This paper provides an analysis of the relative merits of three architectura...
Timothy E. Levin, Cynthia E. Irvine, Clark Weissma...