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131
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ICPP
2008
IEEE
15 years 11 months ago
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Xin Fu, Wangyuan Zhang, Tao Li, José A. B. ...
PPOPP
2005
ACM
15 years 10 months ago
Fault tolerant high performance computing by a coding approach
As the number of processors in today’s high performance computers continues to grow, the mean-time-to-failure of these computers are becoming significantly shorter than the exe...
Zizhong Chen, Graham E. Fagg, Edgar Gabriel, Julie...
ACMSE
2004
ACM
15 years 10 months ago
Performance evaluation of cache replacement policies for the SPEC CPU2000 benchmark suite
Replacement policy, one of the key factors determining the effectiveness of a cache, becomes even more important with latest technological trends toward highly associative caches....
Hussein Al-Zoubi, Aleksandar Milenkovic, Milena Mi...
146
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SIGECOM
2010
ACM
164views ECommerce» more  SIGECOM 2010»
15 years 9 months ago
Automated market-making in the large: the gates hillman prediction market
We designed and built the Gates Hillman Prediction Market (GHPM) to predict the opening day of the Gates and Hillman Centers, the new computer science buildings at Carnegie Mellon...
Abraham Othman, Tuomas Sandholm
PAM
2010
Springer
15 years 6 months ago
OpenTM: Traffic Matrix Estimator for OpenFlow Networks
Abstract. In this paper we present OpenTM, a traffic matrix estimation system for OpenFlow networks. OpenTM uses built-in features provided in OpenFlow switches to directly and acc...
Amin Tootoonchian, Monia Ghobadi, Yashar Ganjali