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APSEC
2005
IEEE
15 years 10 months ago
A Formal Semantics of Timed Activity Diagrams and its PROMELA Translation
The lack of a precise semantics for UML activity diagrams makes the reasoning on models constructed using such diagrams infeasible. However, such diagrams are widely used in domai...
Nicolas Guelfi, Amel Mammar
DFT
2005
IEEE
92views VLSI» more  DFT 2005»
15 years 10 months ago
Simulating Faults of Combinational IP Core-based SOCs in a PLI Environment
This paper presents a new test methodology which utilizes the Programming Language Interface (PLI) for performing fault simulation of combinational or full scan Intellectual Prope...
Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lom...
FDL
2005
IEEE
15 years 10 months ago
Integrating Model-Checking with UML-based SoC Development
In order to address the complexities of SoC design, rigorous development methods and automated tools are required. This paper presents an approach to formal verification using mod...
Peter Green, Kinika Tasie-Amadi
ISORC
2005
IEEE
15 years 10 months ago
On Real-Time Performance of Ahead-of-Time Compiled Java
One of the main challenges in getting acceptance for safe object-oriented languages in hard real-time systems is to combine automatic memory management with hard real-time constra...
Anders Nilsson, Sven Gestegard Robertz
TIME
2005
IEEE
15 years 10 months ago
An XML-Based Framework for Temporal Database Implementation
This paper presents an XML-based approach to implementing the parametric model of temporal databases. In the parametric model, attribute values are functions of time and the entir...
Seo-Young Noh, Shashi K. Gadia