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» Evaluating CMPs and Their Memory Architecture
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ISCA
2012
IEEE
237views Hardware» more  ISCA 2012»
11 years 10 months ago
BOOM: Enabling mobile memory based low-power server DIMMs
To address the real-time processing needs of large and growing amounts of data, modern software increasingly uses main memory as the primary data store for critical information. T...
Doe Hyun Yoon, Jichuan Chang, Naveen Muralimanohar...
ICS
2005
Tsinghua U.
14 years 1 months ago
A heterogeneously segmented cache architecture for a packet forwarding engine
As network traffic continues to increase and with the requirement to process packets at line rates, high performance routers need to forward millions of packets every second. Eve...
Kaushik Rajan, Ramaswamy Govindarajan
JPDC
2008
134views more  JPDC 2008»
13 years 7 months ago
Analyzing the performance of a cluster-based architecture for immersive visualization systems
Cluster computing has become an essential issue for designing immersive visualization systems. This paradigm employs scalable clusters of commodity computers with much lower costs...
Pedro Morillo, Aron Bierbaum, Patrick Hartling, Ma...
SC
2009
ACM
14 years 2 months ago
Early performance evaluation of a "Nehalem" cluster using scientific and engineering applications
In this paper, we present an early performance evaluation of a 624-core cluster based on the Intel® Xeon® Processor 5560 (code named “Nehalem-EP”, and referred to as Xeon 55...
Subhash Saini, Andrey Naraikin, Rupak Biswas, Davi...
EUROSYS
2007
ACM
14 years 4 months ago
STMBench7: a benchmark for software transactional memory
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
Rachid Guerraoui, Michal Kapalka, Jan Vitek