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» Evaluating CMPs and Their Memory Architecture
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IPPS
2006
IEEE
14 years 1 months ago
An experimental study of optimizing bioinformatics applications
As bioinformatics is an emerging application of high performance computing, this paper first evaluates the memory performance of several representative bioinformatics application...
Guangming Tan, Lin Xu, Shengzhong Feng, Ninghui Su...
HPCA
2002
IEEE
14 years 8 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
ASAP
2008
IEEE
82views Hardware» more  ASAP 2008»
14 years 2 months ago
Run-time thread sorting to expose data-level parallelism
We address the problem of data parallel processing for computational quantum chemistry (CQC). CQC is a computationally demanding tool to study the electronic structure of molecule...
Tirath Ramdas, Gregory K. Egan, David Abramson, Ki...
ICS
2007
Tsinghua U.
14 years 1 months ago
Scheduling FFT computation on SMP and multicore systems
Increased complexity of memory systems to ameliorate the gap between the speed of processors and memory has made it increasingly harder for compilers to optimize an arbitrary code...
Ayaz Ali, S. Lennart Johnsson, Jaspal Subhlok
TC
2010
13 years 6 months ago
Architecture Exploration of High-Performance PCs with a Solid-State Disk
—As the cost per bit of NAND flash memory devices rapidly decreases, NAND-flash-based Solid-State Disks (SSDs) are replacing Hard Disk Drives (HDDs) used in a wide spectrum of co...
Dong Kim, Kwanhu Bang, Seung-Hwan Ha, Sungroh Yoon...