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CCGRID
2008
IEEE
14 years 4 months ago
A Performance Study of Secure Data Mining on the Cell Processor
— This paper examines the potential of the Cell processor as a platform for secure data mining on the future volunteer computing systems. Volunteer computing platforms have the p...
Hong Wang 0006, Hiroyuki Takizawa, Hiroaki Kobayas...
TOCS
2011
111views more  TOCS 2011»
13 years 5 months ago
SEATTLE: A Scalable Ethernet Architecture for Large Enterprises
IP networks today require massive effort to configure and manage. Ethernet is vastly simpler to manage, but does not scale beyond small local area networks. This paper describes ...
Changhoon Kim, Matthew Caesar, Jennifer Rexford
ISCA
1999
IEEE
94views Hardware» more  ISCA 1999»
14 years 2 months ago
A Performance Comparison of Contemporary DRAM Architectures
In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-bas...
Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor ...
SIGMETRICS
2008
ACM
128views Hardware» more  SIGMETRICS 2008»
13 years 10 months ago
Loss-aware network coding for unicast wireless sessions: design, implementation, and performance evaluation
Local network coding is growing in prominence as a technique to facilitate greater capacity utilization in multi-hop wireless networks. A specific objective of such local network ...
Shravan K. Rayanchu, Sayandeep Sen, Jianming Wu, S...
ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
14 years 4 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu