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» Evaluating Hardware Compilation Techniques
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ECBS
2006
IEEE
158views Hardware» more  ECBS 2006»
15 years 10 months ago
Automated Translation of C/C++ Models into a Synchronous Formalism
For complex systems that are reusing intellectual property components, functional and compositional design correctness are an important part of the design process. Common system l...
Hamoudi Kalla, Jean-Pierre Talpin, David Berner, L...
MAM
2007
157views more  MAM 2007»
15 years 4 months ago
Executing large algorithms on low-capacity FPGAs using flowpath partitioning and runtime reconfiguration
This paper describes a new method of executing a software program on an FPGA for embedded systems. Rather than combine reconfigurable logic with a microprocessor core, this method...
Darrin M. Hanna, Michael DuChene
SIGMETRICS
2005
ACM
110views Hardware» more  SIGMETRICS 2005»
15 years 10 months ago
Empirical evaluation of multi-level buffer cache collaboration for storage systems
To bridge the increasing processor-disk performance gap, buffer caches are used in both storage clients (e.g. database systems) and storage servers to reduce the number of slow di...
Zhifeng Chen, Yan Zhang, Yuanyuan Zhou, Heidi Scot...
DLOG
2010
15 years 2 months ago
TBox Classification in Parallel: Design and First Evaluation
Abstract. One of the most frequently used inference services of description logic reasoners classifies all named classes of OWL ontologies into a subsumption hierarchy. Due to emer...
Mina Aslani, Volker Haarslev
149
Voted
DEXAW
2007
IEEE
141views Database» more  DEXAW 2007»
15 years 11 months ago
SWARD: Semantic Web Abridged Relational Databases
The semantic web represents meta-data as a relation of triples using the RDF data model. We have developed a virtual repository system that enables to process queries to RDF views...
Johan Petrini, Tore Risch