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» Evaluating Hardware Compilation Techniques
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ASPLOS
2012
ACM
12 years 4 months ago
Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults
Future microprocessors need low-cost solutions for reliable operation in the presence of failure-prone devices. A promising approach is to detect hardware faults by deploying low-...
Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naei...
ICCAD
2006
IEEE
149views Hardware» more  ICCAD 2006»
14 years 5 months ago
Thermal sensor allocation and placement for reconfigurable systems
Temperature monitoring using thermal sensors is an essential tool for evaluating the thermal behavior and sustaining the reliable operation in high-performance and high-power syst...
Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci...
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 3 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
MICRO
2010
IEEE
161views Hardware» more  MICRO 2010»
13 years 6 months ago
AtomTracker: A Comprehensive Approach to Atomic Region Inference and Violation Detection
A particularly insidious type of concurrency bug is atomicity violations. While there has been substantial work on automatic detection of atomicity violations, each existing techn...
Abdullah Muzahid, Norimasa Otsuki, Josep Torrellas
ASPLOS
2012
ACM
12 years 4 months ago
Aikido: accelerating shared data dynamic analyses
Despite a burgeoning demand for parallel programs, the tools available to developers working on shared-memory multicore processors have lagged behind. One reason for this is the l...
Marek Olszewski, Qin Zhao, David Koh, Jason Ansel,...