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» Evaluating Hardware Compilation Techniques
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CASES
2005
ACM
13 years 11 months ago
A post-compilation register reassignment technique for improving hamming distance code compression
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
Montserrat Ros, Peter Sutton
LREC
2008
117views Education» more  LREC 2008»
13 years 10 months ago
A Suite to Compile and Analyze an LSP Corpus
This paper presents a series of tools for the extraction of specialized corpora from the web and its subsequent analysis mainly with statistical techniques. It is an integrated sy...
Rogelio Nazar, Jorge Vivaldi, Teresa Cabré
ICS
1995
Tsinghua U.
14 years 15 days ago
Idiom Recognition in the Polaris Parallelizing Compiler
The elimination of induction variables and the parallelization of reductions in FORTRAN programs have been shown to be integral to performance improvement on parallel computers 7,...
William M. Pottenger, Rudolf Eigenmann
CODES
2006
IEEE
14 years 3 months ago
Retargetable code optimization with SIMD instructions
Retargetable C compilers are nowadays widely used to quickly obtain compiler support for new embedded processors and to perform early processor architecture exploration. One frequ...
Manuel Hohenauer, Christoph Schumacher, Rainer Leu...
CARDIS
2006
Springer
114views Hardware» more  CARDIS 2006»
14 years 21 days ago
A Low-Footprint Java-to-Native Compilation Scheme Using Formal Methods
Ahead-of-Time and Just-in-Time compilation are common ways to improve runtime performances of restrained systems like Java Card by turning critical Java methods into native code. H...
Alexandre Courbot, Mariela Pavlova, Gilles Grimaud...