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» Evaluating Hardware Compilation Techniques
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EUROPAR
2008
Springer
13 years 12 months ago
Efficiently Building the Gated Single Assignment Form in Codes with Pointers in Modern Optimizing Compilers
Abstract. Understanding program behavior is at the foundation of program optimization. Techniques for automatic recognition of program constructs characterize the behavior of code ...
Manuel Arenaz, Pedro Amoedo, Juan Touriño
EDCC
2006
Springer
14 years 1 months ago
Dynamic Derivation of Application-Specific Error Detectors and their Implementation in Hardware
- This paper proposes a novel technique for preventing a wide range of data errors from corrupting the execution of applications. The proposed technique enables automated derivatio...
Karthik Pattabiraman, Giacinto Paolo Saggese, Dani...
HPCA
2004
IEEE
14 years 10 months ago
Hardware Support for Prescient Instruction Prefetch
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wan...
ACSAC
2003
IEEE
14 years 1 months ago
Defending Embedded Systems Against Buffer Overflow via Hardware/Software
Buffer overflow attacks have been causing serious security problems for decades. With more embedded systems networked, it becomes an important research problem to defend embedded ...
Zili Shao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean...
VEE
2012
ACM
238views Virtualization» more  VEE 2012»
12 years 5 months ago
Swift: a register-based JIT compiler for embedded JVMs
Code quality and compilation speed are two challenges to JIT compilers, while selective compilation is commonly used to tradeoff these two issues. Meanwhile, with more and more Ja...
Yuan Zhang, Min Yang, Bo Zhou, Zhemin Yang, Weihua...