Sciweavers

1304 search results - page 63 / 261
» Evaluating Hardware Compilation Techniques
Sort
View
LCR
1998
Springer
104views System Software» more  LCR 1998»
15 years 8 months ago
Locality Enhancement for Large-Scale Shared-Memory Multiprocessors
Abstract. This paper gives an overview of locality enhancement techniques used by the Jasmine compiler, currently under development at the University of Toronto. These techniques e...
Tarek S. Abdelrahman, Naraig Manjikian, Gary Liu, ...
ICC
2007
IEEE
121views Communications» more  ICC 2007»
15 years 10 months ago
A Real-Time Hardware-Based Scheduler For Next-Generation Optical Burst Switches
– Optical burst switching (OBS) is a promising technique for next-generation optical switching networks. In traditional OBS, an entire burst is discarded when all output waveleng...
Muhammad T. Anan, Ghulam Chaudhry
CGF
2010
148views more  CGF 2010»
15 years 4 months ago
Hardware-Assisted Projected Tetrahedra
We present a flexible and highly efficient hardware-assisted volume renderer grounded on the original Projected Tetrahedra (PT) algorithm. Unlike recent similar approaches, our me...
André Maximo, Ricardo Marroquim, Ricardo C....
COMPSEC
2008
116views more  COMPSEC 2008»
15 years 4 months ago
Enforcing memory policy specifications in reconfigurable hardware
While general-purpose processor based systems are built to enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reco...
Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timo...
VLSI
2007
Springer
15 years 10 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...