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» Evaluating Techniques for Exploiting Instruction Slack
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CAMP
2005
IEEE
13 years 9 months ago
Energy/Performance Evaluation of the Multithreaded Extension of a Multicluster VLIW Processor
Abstract— In this paper we address the problem of the architectural exploration from the energy/performance point of view of a VLIW processor for embedded systems. We also consid...
Domenico Barretta, Gianluca Palermo, Mariagiovanna...
ACSAC
2010
IEEE
13 years 5 months ago
G-Free: defeating return-oriented programming through gadget-less binaries
Despite the numerous prevention and protection mechanisms that have been introduced into modern operating systems, the exploitation of memory corruption vulnerabilities still repr...
Kaan Onarlioglu, Leyla Bilge, Andrea Lanzi, Davide...
CF
2006
ACM
14 years 1 months ago
Kilo-instruction processors, runahead and prefetching
There is a continuous research effort devoted to overcome the memory wall problem. Prefetching is one of the most frequently used techniques. A prefetch mechanism anticipates the ...
Tanausú Ramírez, Alex Pajuelo, Olive...
ASPLOS
2004
ACM
14 years 24 days ago
Scalable selective re-execution for EDGE architectures
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
Rajagopalan Desikan, Simha Sethumadhavan, Doug Bur...
PPOPP
2009
ACM
14 years 8 months ago
Idempotent work stealing
Load balancing is a technique which allows efficient parallelization of irregular workloads, and a key component of many applications and parallelizing runtimes. Work-stealing is ...
Maged M. Michael, Martin T. Vechev, Vijay A. Saras...