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» Evaluating kilo-instruction multiprocessors
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HPCA
1997
IEEE
13 years 11 months ago
Global Address Space, Non-Uniform Bandwidth: A Memory System Performance Characterization of Parallel Systems
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
Thomas Stricker, Thomas R. Gross
RTSS
1996
IEEE
13 years 11 months ago
Integrated scheduling of multimedia and hard real-time tasks
An integrated platform which is capable of meeting the requirements of both traditional real-time control processing and multimedia processing has enormous potential for accommoda...
Hiroyuki Kaneko, John A. Stankovic, Subhabrata Sen...
ASPLOS
2008
ACM
13 years 9 months ago
Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPs
Extracting high-performance from the emerging Chip Multiprocessors (CMPs) requires that the application be divided into multiple threads. Each thread executes on a separate core t...
M. Aater Suleman, Moinuddin K. Qureshi, Yale N. Pa...
CONCURRENCY
1998
139views more  CONCURRENCY 1998»
13 years 7 months ago
Applications experience in Jade
This paper presents our experience developing applications in Jade, a portable, implicitly parallel programming language designed for exploiting task-level concurrency. Jade progr...
Martin C. Rinard
TOMACS
1998
140views more  TOMACS 1998»
13 years 7 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...