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EGH
2004
Springer
14 years 3 months ago
Realtime ray tracing of dynamic scenes on an FPGA chip
Realtime ray tracing has recently established itself as a possible alternative to the current rasterization approach for interactive 3D graphics. However, the performance of exist...
Jörg Schmittler, Sven Woop, Daniel Wagner, Wo...
MEMOCODE
2003
IEEE
14 years 3 months ago
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
ERLANG
2003
ACM
14 years 3 months ago
A study of Erlang ETS table implementations and performance
The viability of implementing an in-memory database, Erlang ETS, using a relatively-new data structure, called a Judy array, was studied by comparing the performance of ETS tables...
Scott Lystig Fritchie
PLDI
2003
ACM
14 years 3 months ago
Bug isolation via remote program sampling
We propose a low-overhead sampling infrastructure for gathering information from the executions experienced by a program’s user community. Several example applications illustrat...
Ben Liblit, Alexander Aiken, Alice X. Zheng, Micha...
FPL
2009
Springer
107views Hardware» more  FPL 2009»
14 years 2 months ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...