Sciweavers

207 search results - page 13 / 42
» Evaluating the Performance of Software Cache Coherence
Sort
View
IEEEPACT
2007
IEEE
14 years 1 months ago
Call-chain Software Instruction Prefetching in J2EE Server Applications
We present a detailed characterization of instruction cache performance for IBM’s J2EE-enabled web server, WebSphere Application Server (WAS). When running two J2EE benchmarks o...
Priya Nagpurkar, Harold W. Cain, Mauricio J. Serra...
WMPI
2004
ACM
14 years 27 days ago
Memory coherence activity prediction in commercial workloads
Abstract. Recent research indicates that prediction-based coherence optimizations offer substantial performance improvements for scientific applications in distributed shared memor...
Stephen Somogyi, Thomas F. Wenisch, Nikolaos Harda...
CF
2009
ACM
14 years 2 months ago
Core monitors: monitoring performance in multicore processors
As we reach the limits of single-core computing, we are promised more and more cores in our systems. Modern architectures include many performance counters per core, but few or no...
Paul E. West, Yuval Peress, Gary S. Tyson, Sally A...
ISCA
2007
IEEE
167views Hardware» more  ISCA 2007»
14 years 1 months ago
New cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
Zhenghong Wang, Ruby B. Lee
ISCA
2007
IEEE
126views Hardware» more  ISCA 2007»
14 years 1 months ago
Comparing memory systems for chip multiprocessors
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...
Jacob Leverich, Hideho Arakida, Alex Solomatnikov,...