207 search results - page 17 / 42 » Evaluating the Performance of Software Cache Coherence |
ICDCS
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper evaluates the use of per-node multi-threading to hide remote memory and synchronization latencies in a software DSM. As with hardware systems, multi-threading in softwa...
ICS
1999
Tsinghua U.
13 years 11 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
EGH
2007
Springer
14 years 1 months ago
2007
Springer
Evaluating pixel shaders consumes a growing share of the computational budget for real-time applications. However, the significant temporal coherence in visible surface regions, ...
CF
2010
ACM
14 years 18 days ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
WWW
2005
ACM
14 years 8 months ago
2005
ACM
Large web search engines have to answer thousands of queries per second with interactive response times. Due to the sizes of the data sets involved, often in the range of multiple...