207 search results - page 32 / 42 » Evaluating the Performance of Software Cache Coherence |
SC
1995
ACM
13 years 11 months ago
1995
ACM
The goal of this work is to explore architectural mechanisms for supporting explicit communication in cachecoherent shared memory multiprocessors. The motivation stems from the ob...
HPCA
2002
IEEE
14 years 7 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
CODES
2002
IEEE
14 years 14 days ago
2002
IEEE
In many embedded systems, existence of a data cache might influence the effectiveness of process scheduling policy significantly. Consequently, a scheduling policy that takes in...
ISPASS
2008
IEEE
14 years 1 months ago
2008
IEEE
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...