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IEEEPACT
2007
IEEE
14 years 1 months ago
Architectural Support for the Stream Execution Model on General-Purpose Processors
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mende...
TC
2010
13 years 5 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
MVA
1992
188views Computer Vision» more  MVA 1992»
13 years 7 months ago
The Programmable and Configurable Low Level Vision Unit of the HERMIA Machine
In this work the Low Level Vision Unit (LLVU) of the Heterogeneous and Reconfigurable Machine for Image Analysis (HERMIA) is described. The LLVU consists of the innovative integra...
Gaetano Gerardi, Giancarlo Parodi
ESTIMEDIA
2009
Springer
14 years 1 months ago
QoS management of dynamic video tasks by task splitting and skipping
—We have integrated processing with deterministic and non-deterministic resource usage in an overall application and evaluated its performance on a multi-core processor platform....
Rob Albers, Eric Suijs, Peter H. N. de With
ICS
2009
Tsinghua U.
14 years 1 months ago
Towards 100 gbit/s ethernet: multicore-based parallel communication protocol design
Ethernet line rates are projected to reach 100 Gbits/s by as soon as 2010. While in principle suitable for high performance clustered and parallel applications, Ethernet requires ...
Stavros Passas, Kostas Magoutis, Angelos Bilas