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JPDC
2000
141views more  JPDC 2000»
13 years 7 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
LCN
1998
IEEE
13 years 11 months ago
High Performance Integrated Network Communications Architecture (INCA)
Current communication subsystem mechanisms within workstation and PC class computers are limiting network communications throughput to a small percentage of the present network da...
Klaus Schug, Anura P. Jayasumana, Prasanth Gopalak...
ISCA
1997
IEEE
137views Hardware» more  ISCA 1997»
13 years 11 months ago
VM-Based Shared Memory on Low-Latency, Remote-Memory-Access Networks
Recent technological advances have produced network interfaces that provide users with very low-latency access to the memory of remote machines. We examine the impact of such netw...
Leonidas I. Kontothanassis, Galen C. Hunt, Robert ...
WSC
2004
13 years 8 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
CHES
1999
Springer
91views Cryptology» more  CHES 1999»
13 years 11 months ago
A High-Performance Flexible Architecture for Cryptography
Cryptographic algorithms are more efficiently implemented in custom hardware than in software running on general-purpose processors. However, systems which use hardware implementat...
R. Reed Taylor, Seth Copen Goldstein