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ISCA
1994
IEEE
104views Hardware» more  ISCA 1994»
14 years 1 days ago
Exploring the Design Space for a Shared-Cache Multiprocessor
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
Basem A. Nayfeh, Kunle Olukotun
ASPDAC
1998
ACM
72views Hardware» more  ASPDAC 1998»
13 years 12 months ago
Space- and Time-Efficient BDD Construction via Working Set Control
Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of proto...
Bwolen Yang, Yirng-An Chen, Randal E. Bryant, Davi...
ASPDAC
2007
ACM
119views Hardware» more  ASPDAC 2007»
13 years 12 months ago
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng,...
IPPS
2009
IEEE
14 years 2 months ago
Exploring the multiple-GPU design space
Graphics Processing Units (GPUs) have been growing in popularity due to their impressive processing capabilities, and with general purpose programming languages such as NVIDIA’s...
Dana Schaa, David R. Kaeli
IFM
2009
Springer
155views Formal Methods» more  IFM 2009»
13 years 5 months ago
Application of Graph Transformation in Verification of Dynamic Systems
Abstract. A communication system evolves dynamically with the addition and deletion of services. In our previous work [12], a graph transformation system (GTS) was used to model th...
Zarrin Langari, Richard J. Trefler