164 search results - page 23 / 33 » Executable Computational Logics: Combining Formal Methods an... |
SAC
2010
ACM
13 years 5 months ago
2010
ACM
Verification conditions (VCs) are logical formulae whose validity implies the correctness of a program with respect to a specification. The technique of checking software properti...
RSP
2003
IEEE
14 years 25 days ago
2003
IEEE
The paper shows the outlines of the SLAM system and how its design is suitable for automating rapid prototyping. The system includes a very expressive object oriented specificati...
TROB
2002
13 years 7 months ago
2002
Reconfigurable software is highly desired for automated machine tool control systems for low-cost products and short time to market. In this paper, we propose a software architectu...
IJCAI
2007
13 years 9 months ago
2007
Temporal reasoning is widely used within both Computer Science and A.I. However, the underlying complexity of temporal proof in discrete temporal logics has led to the use of simp...
HYBRID
2010
Springer
13 years 9 months ago
2010
Springer
In this paper, we describe a receding horizon scheme that satisfies a class of linear temporal logic specifications sufficient to describe a wide range of properties including saf...