453 search results - page 62 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
LCTRTS
2009
Springer
14 years 3 months ago
2009
Springer
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
JSA
2000
13 years 8 months ago
2000
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
POPL
2009
ACM
14 years 3 months ago
2009
ACM
With the emergence of commodity multicore architectures, exploiting tightly-coupled parallelism has become increasingly important. Functional programming languages, such as Haskel...
CASCON
1996
13 years 10 months ago
1996
The trend in workstation hardware is towards symmetric shared-memory multiprocessors (SMPs). User expectations are for (largely) automatic exploitation of parallelismon an SMP, si...
ASPLOS
1996
ACM
14 years 1 months ago
1996
ACM
This paper describes Shasta, a system that supports a shared address space in software on clusters of computers with physically distributed memory. A unique aspect of Shasta compa...