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» Execution architectures for program algebra
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CGO
2008
IEEE
14 years 1 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
SEMWEB
2007
Springer
14 years 1 months ago
Semantic Enterprise Technologies
Abstract. Nowadays enterprises request information technologies that leverage structured and unstructured information for providing a single integrated view of business problems in...
Massimo Ruffolo, Luigi Guadagno, Inderbir Sidhu
ISPASS
2006
IEEE
14 years 1 months ago
Simulation sampling with live-points
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch...
Thomas F. Wenisch, Roland E. Wunderlich, Babak Fal...
PPOPP
2005
ACM
14 years 29 days ago
Fault tolerant high performance computing by a coding approach
As the number of processors in today’s high performance computers continues to grow, the mean-time-to-failure of these computers are becoming significantly shorter than the exe...
Zizhong Chen, Graham E. Fagg, Edgar Gabriel, Julie...
RTSS
2003
IEEE
14 years 20 days ago
Data Caches in Multitasking Hard Real-Time Systems
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
Xavier Vera, Björn Lisper, Jingling Xue