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ACSD
2001
IEEE
74views Hardware» more  ACSD 2001»
14 years 11 days ago
From Code to Models
One of the corner stones of formal methods is the notion traction enables analysis. By the construction of act model we can trade implementation detail for analytical power. The i...
Gerard J. Holzmann
FPL
2008
Springer
157views Hardware» more  FPL 2008»
13 years 10 months ago
Chosen-message SPA attacks against FPGA-based RSA hardware implementations
This paper presents SPA (Simple Power Analysis) attacks against public-key cryptosystems implemented on an FPGA platform. The SPA attack investigates a power waveform generated by...
Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Ak...
PIMRC
2008
IEEE
14 years 3 months ago
Concurrent and parallel transmissions are optimal for low data-rate IR-UWB networks
— The Internet of Things, emerging pervasive and sensor networks are low data-rate wireless networks with, a priori, no specific topology and no fixed infrastructure. Their pri...
Jean-Yves Le Boudec, Ruben Merz
ISLPED
2010
ACM
205views Hardware» more  ISLPED 2010»
13 years 9 months ago
Peak power modeling for data center servers with switched-mode power supplies
Accurately modeling server power consumption is critical in designing data center power provisioning infrastructure. However, to date, most research proposals have used average CP...
David Meisner, Thomas F. Wenisch
ICSE
2000
IEEE-ACM
14 years 9 days ago
Verification of time partitioning in the DEOS scheduler kernel
This paper describes an experiment to use the Spin model checking system to support automated verification of time partitioning in the Honeywell DEOS real-time scheduling kernel. ...
John Penix, Willem Visser, Eric Engstrom, Aaron La...