774 search results - page 48 / 155 » Experiences of low power design implementation and verificat... |
ATVA
2004
Springer
14 years 15 days ago
2004
Springer
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
RTCSA
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper we analyze the traditional model of interrupt management and its inability to incorporate the reliability and temporal predictability demanded by real-time systems. ...
CORR
2010
Springer
13 years 3 months ago
2010
Springer
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
DAC
1995
ACM
14 years 9 days ago
1995
ACM
- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the ...
CAV
2001
Springer
14 years 12 days ago
2001
Springer
In this paper we present the application of generalized retiming for temporal property checking. Retiming is a structural transformation that relocates registers in a circuit-based...