—The performance bottleneck for many scientific applications is the cost of memory access inside linear algebra kernels. Tuning such kernels for memory efficiency is a complex ...
Verifying concurrent programs is challenging since the number of thread interleavings that need to be explored can be huge even for moderate programs. We present a cartesian semant...
Guy Gueta, Cormac Flanagan, Eran Yahav, Mooly Sagi...
This paper presents our implementation techniques for an intelligent Web image search engine. A reference architecture of the system is provided and addressed in this paper. The s...
This paper presents the design and implementation of the MPI-IO interface for the Clusterfile parallel file system. The approach offers the opportunity of achieving a high corelat...
We present the design and implementation of the Janus1 architecture for providing flexible and lightweight access to sensor network resources from Internet-type networks. Janus p...