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» Experimentation with bounded buffer synchronization
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ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
14 years 1 months ago
Transition time bounded low-power clock tree construction
— Recently power becomes a significant issue in clock network design for high-performance ICs because the clock network consumes a large portion of the total power in the whole s...
Min Pan, Chris C. N. Chu, J. Morris Chang
ACST
2006
13 years 9 months ago
Experimental study of hybrid-type distributed maximal constraint satisfaction algorithm
A constraint satisfaction problem (CSP) is a general framework that can formalize various application problems in artificial intelligence. However, practical real-world problems t...
Masato Noto, Masahito Kurihara
DAC
2012
ACM
11 years 10 months ago
STM concurrency control for embedded real-time software with tighter time bounds
We consider software transactional memory (STM) concurrency control for multicore real-time software, and present a novel contention manager (CM) for resolving transactional conï¬...
Mohammed El-Shambakey, Binoy Ravindran
APLAS
2008
ACM
13 years 9 months ago
Abstraction of Clocks in Synchronous Data-Flow Systems
ion of Clocks in Synchronous Data-flow Systems Albert Cohen1 , Louis Mandel2 , Florence Plateau2 , and Marc Pouzet23 1 INRIA Saclay - Ile-de-France, Orsay, France 2 LRI, Univ. Pari...
Albert Cohen, Louis Mandel, Florence Plateau, Marc...
JSSPP
2000
Springer
13 years 11 months ago
Time-Sharing Parallel Jobs in the Presence of Multiple Resource Requirements
Abstract. Buffered coscheduling is a new methodology that can substantially increase resource utilization, improve response time, and simplify the development of the run-time suppo...
Fabrizio Petrini, Wu-chun Feng