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» Explaining Verification Conditions
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JSW
2006
82views more  JSW 2006»
13 years 7 months ago
Incremental Implementation of Syntax Driven Logics
Abstract-- This paper describes a technique combining higher order functions, algebraic datatypes, and monads to incrementally implement syntax driven logics. Extensions can be com...
Ignatius Sri Wishnu Brata Prasetya, A. Azurat, Tan...
SIGMETRICS
2008
ACM
130views Hardware» more  SIGMETRICS 2008»
13 years 7 months ago
Using probabilistic model checking in systems biology
Probabilistic model checking is a formal verification framework for systems which exhibit stochastic behaviour. It has been successfully applied to a wide range of domains, includ...
Marta Z. Kwiatkowska, Gethin Norman, David Parker
ICFEM
2009
Springer
13 years 5 months ago
Verifying Ptolemy II Discrete-Event Models Using Real-Time Maude
Abstract. This paper shows how Ptolemy II discrete-event (DE) models can be formally analyzed using Real-Time Maude. We formalize in Real-Time Maude the semantics of a subset of hi...
Kyungmin Bae, Peter Csaba Ölveczky, Thomas Hu...
ICECCS
1999
IEEE
140views Hardware» more  ICECCS 1999»
14 years 2 days ago
Practical Considerations in Protocol Verification: The E-2C Case Study
We report on our efforts to formally specify and verify a new protocol of the E-2C Hawkeye Early Warning Aircraft. The protocol, which is currently in test at Northrop Grumman, su...
Yifei Dong, Scott A. Smolka, Eugene W. Stark, Step...
IJFCS
2008
81views more  IJFCS 2008»
13 years 7 months ago
Reachability Analysis in Verification via Supercompilation
Abstract. We present an approach to verification of parameterized systems, which is based on program transformation technique known as supercompilation. In this approach the statem...
Alexei Lisitsa, Andrei P. Nemytykh