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» Explaining Verification Conditions
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SIGSOFT
2010
ACM
13 years 2 months ago
Language-based verification will change the world
We argue that lightweight, language-based verification is poised to enter mainstream industrial use, where it will have a major impact on software quality and reliability. We expl...
Tim Sheard, Aaron Stump, Stephanie Weirich
SEFM
2005
IEEE
14 years 1 months ago
Omnibus Verification Policies: A flexible, configurable approach to assertion-based software verification
The three main assertion-based verification approaches are: Design by Contract (DBC), Extended Static Checking (ESC) and Verified Design by Contract (VDBC). Each approach offers a...
Thomas Wilson, Savi Maharaj, Robert G. Clark
POPL
2007
ACM
14 years 8 months ago
Conditional must not aliasing for static race detection
Race detection algorithms for multi-threaded programs using the common lock-based synchronization idiom must correlate locks with the memory locations they guard. The heart of a p...
Mayur Naik, Alex Aiken
CONCUR
2010
Springer
13 years 8 months ago
Conditional Automata: A Tool for Safe Removal of Negligible Events
Abstract. Polynomially accurate simulations [19] are relations for Probabilistic Automata that require transitions to be matched up to negligible sets provided that computation len...
Roberto Segala, Andrea Turrini
NIPS
2003
13 years 9 months ago
Model Uncertainty in Classical Conditioning
We develop a framework based on Bayesian model averaging to explain how animals cope with uncertainty about contingencies in classical conditioning experiments. Traditional accoun...
Aaron C. Courville, Nathaniel D. Daw, Geoffrey J. ...