375 search results - page 43 / 75 » Explicit gate delay model for timing evaluation |
SIGMOD
2008
ACM
14 years 7 months ago
2008
ACM
Scientific workflow systems are increasingly used to automate complex data analyses, largely due to their benefits over traditional approaches for workflow design, optimization, a...
FMICS
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
GLOBECOM
2008
IEEE
14 years 2 months ago
2008
IEEE
—In this paper we propose a model to compute an upper bound for the maximum network size in mobile ad-hoc networks. Our model is based on the foundation that for a unicast route ...
SOPR
2002
13 years 7 months ago
2002
Good project scheduling is an essential, but extremely hard task in software management practice. In a software project, the time needed to complete some development activity is d...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
— Process variations in digital circuits make sequential circuit timing validation an extremely challenging task. In this paper, a Statistical Bellman-Ford (SBF) algorithm is pro...